Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.

As system-on-chip (SoC) designs grow larger, designers must grapple with serious global timing problems, the effect of wire loading and timing delays and the performance hit associated with supporting ...

Non-mainstream technologies can offer advantages over more commonly used approaches, but usually at some additional cost (otherwise they’d probably be mainstream). The additional cost could be in ...

Silistix, an IP-bus and EDA startup originating from research performed by the University of Manchester and funded by Intel Capital, wants to help you make the next generation of SOCs (systems on ...

MONTEREY, Calif. — A shift to asynchronous design styles is "inevitable" for digital computing systems, according to Ivan Sutherland, vice president and fellow at Sun Microsystems Laboratories.